PLM clock 24MHz / FIFO / AKM AK4118EQ / XMOS XU208
The digital path of the Cronos is based on a 24bit AKM AK4118 24bit SPDIF receiver on a 24MHZ PLL clock. The USB input has the XMOS XU208, a formidable processor with a processing power of 1000Mips to 8 cores that decodes the DSD 256 11.288MHz.
The whole thing goes through a FIFO DSP Altera MAXII reducing the jitter to its simplest expression. Thus the 192 resistors of 0.01% work under conditions of maximum decoding.