EVERSOLO C10 Master Clock

The Eversolo C10 is a master clock designed to provide a stable timing reference for digital Hi-Fi systems. Its SC-cut crystal OCXO oscillator aims to limit frequency variations caused by temperature and internal crystal stress, while its phase noise is specified at −115dBc/Hz or lower at 1Hz. This stability helps synchronized devices maintain the regularity of their digital processing.

Eversolo C10: SC-cut oscillator and thermal control

The SC-cut geometry of the crystal helps reduce its sensitivity to thermal variations and mechanical stress, while promoting long-term stability. Precise temperature control keeps the crystal within its operating conditions, thereby limiting environment-related frequency drift. This design forms the basis of the 10MHz reference delivered by the C10.

Eversolo C10: Synchronization and RTE engine

A phase-locked loop (PLL), combined with an internal oscillator and precise feedback control, helps maintain the frequency and phase of the reference. The proprietary Reference Timing Engine (RTE) then organizes system synchronization based on this time base. The 1PPS input allows this operation to be supplemented by an external reference from a GNSS system: the C10 can thus recalibrate its long-term time base using regular synchronization pulses.

Eversolo C10: Four buffered BNC outputs

The four BNC outputs share the same clock source and cover frequencies of 10, 25 and 100MHz. Each has its own buffer circuit, designed to isolate the source from load variations and interference caused by connected devices. This distribution allows several components, such as a streamer, DAC or CD transport, to be synchronized from a common reference.

Eversolo C10: Toroidal transformer

The C10 relies on a toroidal transformer designed to limit magnetic leakage and reduce mains-related disturbances. This power supply delivers stable power to both the clock module and the control circuits, in order to maintain their operation under steady conditions. By isolating these circuits from power supply noise as much as possible, this design helps maintain the stability of the timing reference delivered by the device.