Buffer & FPGA
The Gustard U16 uses 128Mb of RAM as a system buffer and FIFO for processing digital audio signals. Most of the space is used for internal planning of the USB interface chip. The remaining space is reserved so that other logical operations do not interfere with the digital audio processing flow. In order to achieve optimal sound performance, the FIFO's capacity is reduced to a minimum to limit the delay and jitter.
In addition, in order to offer the lowest possible jitter level, the Gustard U16 has no less than 3 FPGAs allowing signal synchronization and managing the WCK 10M output circuit.
At the heart of the USB circuit, an FPGA is used to operate the USB interface in slave mode. Thus, the latter receives the clock signal generated by the FPGA clock management system and outputs only the audio data, limiting the interference generated.
The Gustard U16 also has a 10M CLK input. It is therefore possible to use a very high quality external clock to further improve the performance of the interface.
For safety reasons, the Gustard U16 does not automatically switch to the external clock if it is connected. It is necessary to manually select the internal and external clock sources.